A schematic view of a Simplified semiconductor production process
A Simplified Chip Manufacturing Process:
Wafer fabrication (or short fab) starts with a raw silicon wafer on which it creates a pattern of integrated circuits while going through a series of up to several thousand production activities taking up to several weeks total processing time, depending on the complexity of the microchip to be produced. Operations performed on the wafer include modifying the surface by adding layers of new material or diffusing ions into the surface, etching patterns into a layer, implanting ions, photo lithography, etc.
The wafer sort
process tests the individual chips on the fabbed wafers (also called die) and determines the so-called die bank, the inventory in terms of good die and source of shipments to assembly or directly to customers. The tests themselves are conducted by connecting to the contacts of the die on the wafer and performing electrical tests. Results from these tests are used to continually improve the fab yield of good die by evaluating patterns of malfunctioning chips on the wafer and other process parameters. Optional production steps in the sort process include backgrinding to reduce wafer thickness and power consumption and applying gold to the back of the wafer for better package adhesion.
During the assembly
process the wafer is cut up into the die. The good die are then attached to a package base, lead wires are bonded to the die and the lead frame and finally the package is sealed with a lid.
The last step of semiconductor manufacturing is the final test process which consists of the last quality control before a chip is actually shipped to the customer: During the burn in the device is put under working conditions for a while; this is because most of the malfunctions of a semiconductor device will happen during the first minutes of its operation and become obvious in this electrical test. Depending on the purpose of the specific device a series of additional tests are performed, e.g., environmental tests (hot/cold/room temperature), binning for grading and failure analysis, mechanical tests for bent leads, etc. The last operations are marking, packing, and shipping of the chip.
The semi conductor industry is characterized by large lead times and high market volatility. To complicate the market behavior, technological advances happen very fast and at the same time cyclic market up- and downturns are a characteristic of the semiconductor market. Consequently, proper inventory management is one key factor for success in the semiconductor market. The effects of rapidly advancing technology cause goods in inventory to depreciate very fast, which may lead to considerable losses in case of a steep market downturn. Too little inventory of the right product, on the other hand, can cause significant losses in terms of opportunity costs if high customer demand cannot be satisfied due to the long manufacturing lead times of up to one quarter. Finally, the vast majority of fixed assets is the very expensive front-end equipment which translates into high costs for wasted capacity (e.g., idling, making the wrong product) in fab and sort. As a consequence, maximized front-end capacity utilization is an important constraint in semiconductor planning.
A Simplified Supply Chain Model & Strategies:
A semiconductor supply chain model is a series of operations from fab to final test separated by inventory points and move operations between facilities, and limited by constraints. Inventory buffers consist of raw wafer inventory, die bank, and finished goods. The supply chain constraints consist of capacities, lead times, work-in-process inventory, and inventory points. The inventory and decoupling points within the semiconductor supply chain are: material stock, metal bank, die bank, and finished products. Material stock is the raw wafers purchased from wafer suppliers. Wafers are sliced from ingots, cleaned, polished and sent to fabrication sites for wafer processing. Metal bank is inventory of wafers that have gone through a certain number of masking steps, and die bank is an inventory control point of finished wafers ready for dicing and packaging. Finished products are built from either metal bank or die bank.
The three typical supply chain strategies for semiconductor include buildto-order, assemble-to-order, and make-to-forecast depending on which inventory point the orders draw the associated material. While build-to-order demands include fabrication operations consuming supply from the metal bank, assemble-to-order demands use up inventory at the die bank level. Often, some products operate within all three models. For example, the assemble-to-order strategy for most customer orders draws material from die bank, while specific customer programs will follow make-to-forecast. Raw material procurement, metal bank, and die stock inventory levels are planning driven, while production to customer programs, finished goods regional stock, assemble-to-order from die stock, production from metal bank to order, and pure make-to-order are order driven activities.
Separating the planning and order driven key processes in the supply chain results in separating supply chain management and manufacturing control: Waferfabs deliver to die bank, and back-end sites deliver to customer orders. In other words, we have to deal with planning driven activities up to die bank (push), and demand-pull from die bank for customer orders. Forward integration focuses on customers throughout the supply chain by extending the supply chain control points to include JIT deliveries, VMI programs, and expand the utilization of EDI and E-Commerce.
Filed under: SCM